Full simulation coverage for SystemC transaction-level models of systems-on-a-chip

Author:

Helmstetter C.,Maraninchi F.,Maillet-Contoz L.

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Theoretical Computer Science,Software

Reference36 articles.

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2. Herrera F, Villar E (2006) Extension of the SystemC kernel for simulation coverage improvement of system-level concurrent specifications. In: FDL’06: forum on specification & design languages, September 2006

3. Flanagan C, Godefroid P (2005) Dynamic partial-order reduction for model checking software. In: POPL ’05: proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on principles of programming languages, New York, NY, USA. ACM Press, New York, pp 110–121

4. Helmstetter C, Maraninchi F, Maillet-Contoz L, Moy M (2006) Automatic generation of schedulings for improving the test coverage of systems-on-a-chip. In: FMCAD 2006, pp 171–178

5. Helmstetter C, Maraninchi F, Maillet-Contoz L (2006) Test coverage for loose timing annotations. In: 11th international workshop on formal methods for industrial critical systems. Springer, Berlin

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3. Software Model Checking SystemC;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2013-05

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5. Completeness-Driven Development;Lecture Notes in Computer Science;2012

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