Deadlock-freedom in component systems with architectural constraints-Reference-Cited by-同舟云学术

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Deadlock-freedom in component systems with architectural constraints

Published:2012-05-16 Issue:2 Volume:41 Page:129-177
ISSN:0925-9856
Container-title:Formal Methods in System Design
language:en
Short-container-title:Form Methods Syst Des

Author:

Martens Moritz,Majster-Cederbaum Mila

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/s10703-012-0160-6.pdf

Reference63 articles.

1. Enterprise JavaBeans. See: http://java.sun.com/products/ejb

2. LNCS;PA Abdulla,2009

3. Apt KR, Francez N, de Roever WP (1980) A proof system for communicating sequential processes. ACM Trans Program Lang Syst 2(3). doi: 10.1145/357103.357110

4. LNCS;PC Attie,2005

5. Attie PC, Emerson EA (1998) Synthesis of concurrent systems with many similar processes. ACM Trans Program Lang Syst 20(1):51–115

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Global and Local Deadlock Freedom in BIP;ACM Transactions on Software Engineering and Methodology;2017-07-31

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