Parallel application sampling for accelerating MPSoC simulation
Author:
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Software
Link
http://link.springer.com/content/pdf/10.1007/s10617-010-9064-0.pdf
Reference29 articles.
1. Ascia G, Catania V, Nuovo AGD, Palesi M, Patti D (2007) Efficient design space exploration for application specific systems-on-a-chip. J Syst Archit 53
2. Atitallah RB, Niar S, Meftali S, Dekeyser J-L (2007) An MPSoC performance estimation framework using transaction level modeling. In: The IEEE international conference on embedded and real-time computing systems and applications (RTCSA), August 2007
3. Benini L, Bertozzi D, Bogliolo A, Menichelli F, Olivieri M (2005) MPARM: Exploring the multi-processor SoC design space with SystemC. J VLSI Signal Process 41
4. Biesbrouck MV, Calder B, Eeckhout L (2006) Efficient sampling startup for simpoint. IEEE Micro Mag 26
5. Biesbroucky MV, Eeckhout L, Calder B (2006) Considering all starting points for simultaneous multithreading simulation. In: The IEEE international symposium on performance analysis of systems and software (ISPASS), March 2006
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