Design exploration of a NVM based hybrid instruction memory organization for embedded platforms-Reference-Cited by-同舟云学术

Design exploration of a NVM based hybrid instruction memory organization for embedded platforms

Published:2013-09 Issue:3-4 Volume:17 Page:459-483
ISSN:0929-5585
Container-title:Design Automation for Embedded Systems
language:en
Short-container-title:Des Autom Embed Syst

Author:

Komalan Manu Perumkunnil,Pérez José Ignacio Gómez,Tenllado Christian,Montañana José Miguel,Artés Antonio,Fernández José Francisco Tirado,Catthoor Francky

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Software

Link

http://link.springer.com/content/pdf/10.1007/s10617-014-9151-8.pdf

Reference32 articles.

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3. Chen YT, Cong J, Huang H, Liu B, Liu C, Potkonjak M, Reinman G (2012) Dynamically reconfigurable hybrid cache: an energy-efficient last-level cache design. In: Design, automation test in Europe conference exhibition (DATE), pp 45–50. doi: 10.1109/DATE.2012.6176431

4. Mangalagiri P, Sarpatwari K, Yanamandra A, Narayanan V, Xie Y, Irwin MJ, Karim OA (2008) In: Proceedings of the 18th ACM Great Lakes symposium on VLSI (ACM, 2008), GLSVLSI ’08, pp 395–398. doi: 10.1145/1366110.1366204

5. Smullen CW, Mohan V, Nigam A, Gurumurthi S, Stan MR (2011) In: IEEE 17th international symposium on high performance computer architecture (HPCA), 2011, University of Virginia, pp 50–61

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