RF/Analog Performance Optimization and Assessing Linearity/Distortion FoMs of HDDP-DG-NCFET for Terahertz Applications
Author:
Publisher
Springer Science and Business Media LLC
Subject
Multidisciplinary
Link
https://link.springer.com/content/pdf/10.1007/s13369-023-08671-2.pdf
Reference43 articles.
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2. Salahuddin, S.; Datta, S.: Use of negative capacitance to provide voltage amplification for low power nanoscale devices. Nano Lett. 8, 405–410 (2008). https://doi.org/10.1021/nl071804g
3. Krivokapic, Z.; Rana, U.; Galatage, R.; Razavieh, A.; Aziz, A.; Liu, J.; Shi, J.; Kim, H.J.; Sporer, R.; Serrao, C.; Busquet, A.; Polakowski, P.; Müller, J.; Kleemeier, W.; Jacob, A.; Brown, D.; Knorr, A.; Carter, R.; Banna, S.: 14 nm Ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications. In: Technical Digest—International Electron Devices Meeting, IEDM, pp. 15.1.1–15.1.4. IEEE (2018)
4. Li, J.; Zhou, J.; Han, G.; Liu, Y.; Peng, Y.; Zhang, J.; Sun, Q.Q.; Zhang, D.W.; Hao, Y.: Correlation of gate capacitance with drive current and transconductance in negative capacitance Ge PFETs. IEEE Electron Device Lett. 38, 1500–1503 (2017). https://doi.org/10.1109/LED.2017.2746088
5. Li, Y.; Kang, Y.; Gong, X.: Evaluation of negative capacitance ferroelectric MOSFET for analog circuit applications. IEEE Trans. Electron Devices 64, 4317–4321 (2017). https://doi.org/10.1109/TED.2017.2734279
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