Packing and Legalization Free Boolean Satisfiability-based Placement Algorithm for Heterogeneous FPGAs
Author:
Publisher
Springer Science and Business Media LLC
Subject
Multidisciplinary
Link
https://link.springer.com/content/pdf/10.1007/s13369-021-06176-4.pdf
Reference33 articles.
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2. Alawieh, M.B., Li, W., Lin, Y., Singhal, L., Iyer, M., Pan, D.Z.: High-definition routing congestion prediction for large-scale fpgas. ASPDAC (2020)
3. Audemard, G., Simon, L.: Glucose 4.1 (2016). https://www.labri.fr/perso/lsimon/glucose/
4. Chen, G.; Pui, C.W.; Chow, W.K.; Lam, K.C.; Kuang, J.; Young, E.F.Y.; Yu, B.: Ripplefpga: Routability-driven simultaneous packing and placement for modern fpgas. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10), 2022–2035 (2018)
5. Choong, A., Beidas, R., Zhu, J.: Parallelizing simulated annealing-based placement using gpgpu. In: 2010 International Conference on Field Programmable Logic and Applications, pp. 31–34 (2010)
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