Synchronous Communication-Based Many-Core SoC

Author:

Baklouti MounaORCID,Krichene Hana,Abid Mohamed

Publisher

Springer Science and Business Media LLC

Subject

Multidisciplinary

Reference49 articles.

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2. ITRS System Design Source (2011). Available: http://www.itrs.net

3. Krichene, H.; Baklouti, M.; Dekeyser, J.-L.; Marquet, Ph.; Abid, M.: Master-Slave control structure for massively parallel system on chip. In: 16th Euromicro Conference on Digital System Design (DSD), Santander, Spain (2013)

4. Svensson, B.: SIMD Processor Array Architectures, Parallel Processing in Industrial Real-Time Applications. Prentice-Hall, Englewood Cliffs (1992)

5. Kaur, M.; Kaur, R.: A comparative analysis of SIMD and MIMD architectures. Int. J. Adv. Res. Comput. Sci. Softw. Eng. 3(9), 1151–1156 (2013)

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1. A Smart Memory Controller for System on Chip-Based Devices;Journal of Nanomaterials;2022-05-05

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