1. Kearney, D.: Theoretical Limits on the Data Dependent Performance on Asynchronous Circuits. In: Proc. of Intl. Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 201–207 (1999)
2. Martin, A.J., Lines, A., Manohar, R., Nystroem, M., Penzes, P., Southworth, R., Cummings, U.: The Design of an Asynchronous MIPS R3000 Microprocessor. In: Adv. Research in VLSI, pp. 164–181 (1997)
3. Arvind, D.K., Mullins, R.D.: A Fully Asynchronous Superscalar Architecture. In: Proc. of the 1999 Intl. Conf. on Parallel Architectures and Compilation Techniques, pp. 17–22. I. C. S. Press (1999)
4. Garside, J.D., Bainbridge, W.J., Bardsley, A., Clark, D.M., Edwards, D.A., Furber, S.B., Liu, J., Lloyd, D.W., Mohammadi, S., Pepper, J.S., Petlin, O., Temple, S., Woods, J.V.: AMULET3i - An Asynchronous System-on-Chip. In: Proc. of the 6th Intl. Symposium on Advanced Research in Asynchronous Circuits and Systems, April 2000, pp. 162–175. I. C. S. Press (2000)
5. Zhang, Q., Theodoropoulos, G.: Modelling SAMIPS: a Synthesisable Asynchronous MIPS Processor. In: Proc. of the 37th Annual Simulation Symposium, April 2004, pp. 205–212 (2004)