An 8-bit parasitic-insensitive switched-capacitor A/D converter
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/BF00142415.pdf
Reference7 articles.
1. F. Maloberti, ?Switched-capacitor building blocks for analogue signal processing?, Electron. Lett., vol. 19, no. 7, pp. 263?265, 1983.
2. P.W. Li, M.J. Chin, P.R. Gary, and R. Castello, ?A ratio-independent algorithmic analog-to-digital conversion technique?, IEEE J. Solid-State Circuits, vol. SC-19, no. 6, pp. 828?836, 1984.
3. H. Onodera, T. Tateishi, and K. Tamaru, ?A Cyclic A/D Converter that Does Not Require Ratio-Mismatched Components?, IEEE J. Solid-State Circuits, vol. 23, no. 1, pp. 152?158, 1988.
4. B.S. Song, M.F. Tempsett, and K.R. Lakshmikumar, ?A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter?, IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1324?1333, 1988.
5. K. Chen and C. Svensson, ?A parallel A/D converter array structure with common reference processing unit?, IEEE Trans. Circuits Systems, vol. 36, no. 8, pp. 1116?1119, 1989.
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