High-speed, low-power, and configurable on-chip training acceleration platform for spiking neural networks
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Publisher
Springer Science and Business Media LLC
Link
https://link.springer.com/content/pdf/10.1007/s10489-024-05689-3.pdf
Reference31 articles.
1. Nguyen DA, Tran XT, Iacopi F (2021) A Review of Algorithms and Hardware Implementations for Spiking Neural Networks. Journal of Low Power Electronics and Applications 11(2):23. https://doi.org/10.3390/jlpea11020023
2. Kheradpisheh SR, Ganjtabesh M, Thorpe SJ, Masquelier T (2018) STDP-based spiking deep convolutional neural networks for object recognition. Neural Networks 99:56–67. https://doi.org/10.1016/jneunet201712005
3. Guo W, Yantir HE, Fouda ME, Eltawil AM, Salama KN (2022) Toward the Optimal Design and FPGA Implementation of Spiking Neural Networks. IEEE Transactions on Neural Networks and Learning Systems. 33(8):3988–4002. https://doi.org/10.1109/TNNLS20213055421
4. Li S, Zhang Z, Mao R, Xiao J, Chang L, Zhou J (2021) A Fast and Energy-Efficient SNN Processor With Adaptive Clock /Event-Driven Computation Scheme and Online Learning. IEEE Transactions on Circuits and Systems I: Regular Papers 68(4):1543–1552. https://doi.org/10.1109/TCSI20213052885
5. Wu J, Zhan Y, Peng Z, Ji X, Yu G, Zhao R, Wang C (2021) Efficient Design of Spiking Neural Network With STDP Learning Based on Fast CORDIC. IEEE Transactions on Circuits and Systems I: Regular Papers 68(6):2522–2534. https://doi.org/10.1109/TCSI20213061766
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