1. V.K. Agarwal. VLSI Testing, volume 5 of Advances in CAD for VLSI, chapter 3, pages 65–93. North-Holland, 1986. edited by T.W. Williams.
2. B. Becker and J. Hartmann. Optimal-time multipliers and c-test ability. In Proceedings of the 2nd Annual Symposium on Parallel Algorithms and Architectures, pages 146–154, 1990.
3. B. Becker, G. Hotz, R. Kolla, P. Molitor, and H.G. Osthof. Hierarchical design based on a calculus of nets. In Proceedings of the 24th ACM/IEEE Design Automation Conference (DAC87), pages 649–653, June 1987.
4. B. Becker and U. Sparmann. Regular structures and testing: RCC-adders. In Proceedings of the 3rd Aegean Workshop on Computing, pages 288–300, 1988.
5. Theoretical Computer Science;B Becker,1991