Power and Noise Optimization Techniques of RF Active Inductor Using Multi-Finger Gate Transistors
Author:
Publisher
Springer Science and Business Media LLC
Subject
Biomedical Engineering,Bioengineering
Link
http://link.springer.com/article/10.1007/s12668-017-0483-2/fulltext.html
Reference21 articles.
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2. Huang, S., Diao, S., and Lin, F. (2017). A 0.7-V, 8.9μA compact temperature-compensated CMOS subthreshold voltage reference with high reliability, Analog Integrated Circuits and Signal Processing, (1–9).
3. Nguyen, T. K., Kim, C. H., Ihm, G. J., Yang, M. S., & Lee, S. G. (2004). CMOS low-noise amplifier design optimization techniques. IEEE Transactions on Microwave Theory and Techniques, 52(5), 1433–1442.
4. Vertregt, M., & Scholtens, P. (2004). Assessment of the merits of CMOS technology scaling for analog circuit design. Proc ESSCIRC, 57–63.
5. Kang, M., & Yun, I. (2011). Modeling electrical characteristics for multi-finger MOSFETs based on drain voltage variation. Transactions on Electrical and Electronic Materials, 12(6), 245–248.
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