A second-order multi-bit ΣΔ modulator with on-line calibration and digital correction of the digital-to-analog converter mismatches

Author:

Fornasari Andrea,Borghetti Fausto,Malcovati Piero,Maloberti Franco

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference25 articles.

1. Norsworthy, S., Schreier, R., & Temes, G. C. (1997). Delta–sigma data converters—Theory, design and simulation. IEEE Press.

2. Galton, I. (1997). Noise-shaping D/A converters for ΣΔ modulation. In Proceedings of IEEE international symposium on circuits and systems (ISCAS) (Vol. 1, pp. 441–444).

3. Li, Z., & Fiez, T. (2002). Dynamic element matching in low oversampling delta sigma ADCs. In Proceedings of IEEE international symposium on circuits and systems (ISCAS) (Vol. 4, pp. 683–686).

4. Hernandez, L. (1998). A model of mismatch-shaping D/A conversion for linearized DAC architectures. IEEE Transactions on Circuits and Systems I, 45(10), 1068–1076.

5. Rombouts, P., & Weyten, L. (2000). A study of dynamic element-matching techniques for 3 level unit elements. IEEE Transactions on Circuits and Systems II, 47(11), 1177–1187.

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