Controlling Inductive Coupling in Wide Global Signal Busses Through Swizzling
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-005-6792-3.pdf
Reference19 articles.
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3. Y. Ismail and E. Friedman, “Effects of inductance on the propagation delay and repeater insertion in vlsi circuits.” IEEE Transactions on Very Large Scale Integration Systems, vol. 8, no. 2, pp. 195–206, 2000.
4. M. Lee, et al., “Interconnect inductance effects on delay and crosstalk for long on-chip nets with fast input slew rates,” in Proceedings International Symposium on Circuits and Systems, May 1998.
5. Y. Massoud, et al., “Layout techniques for minimizing on-chip interconnect self inductance,” in Proceedings of the ACM/IEEE Design Automation Conference, pp. 566–571, june 1998.
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1. Data bus swizzling in TSV-based three-dimensional integrated circuits;Microelectronics Journal;2013-08
2. Semi-random net reordering for reducing timing variations and improving signal integrity;Microelectronics Journal;2011-02
3. Reducing inductive coupling variance in wide global signal busses;International Journal of Electronics;2009-09
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