A high speed, low voltage to high voltage level shifter in standard 1.2 V 0.13 μm CMOS

Author:

Serneels Bert,Steyaert Michiel,Dehaene Wim

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference6 articles.

1. Annema, A. -J., Geelen, G., & de Jong, P. (2001). 5.5 V I/O in a 2.5 V 0.25 μm CMOS technology. IEEE Journal of Solid-State Circuits, 36(3), 528–538.

2. Sowlati, T., & Leenaerts, D. (2003). A 2.4 GHz 0.18 μm CMOS self-biased cascode power amplifier. IEEE Journal of Solid-State Circuits, 38(8), 1318–1324.

3. Serneels, B., Piessens, T., Steyaert, M., & Dehaene, W. (2004). A high-voltage output driver in a standard 2.5 V 0.25 μm CMOS technology. In ISSCC Digest of Technical Papers, pp. 146–147.

4. Serneels, B., Steyaert, M., & Dehaene, W. (2005). A 5.5 V line driver in a standard 1.2 V 0.13 μm CMOS technology. In Proceedings European Solid-State Circuits Conference, pp. 303–306.

5. Rabaey, J. M. (1996). Digital integrated circuits, a design perspective. Prentice-Hall, Inc.

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