Author:
Sayil Selahattin,Boorla Vijay K.
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Reference24 articles.
1. International technology roadmap for semiconductors. (2009 ed.). San Jose, CA: Semiconductor Industry Association (SIA) (2009).
2. Mitra, S., Karnik, T., Seifert, N., & Zhang, M. (2005). Logic soft errors in sub-65 nm technologies design and CAD challenges. In Proceedings of DAC (pp. 2–3), June 2005.
3. Dodd, P. E., & Massengill, L. W. (2003). Basic mechanisms and modeling of single-event upset in digital microelectronics. IEEE Transactions on Nuclear Science, 50(3), 583–602.
4. Balasubramanian, A., Sternberg, A. L., Bhuva, B. L., & Massengill, L. W. (2006). Crosstalk effects caused by single event hits in deep sub-micron CMOS technologies. IEEE Transactions on Nuclear Science, 53(6), 3306–3311.
5. Balasubramanian, A., Amusan, O. A., Bhuva, B. L., Reed, R. A., Sternberg, A. L., Andrew, L., et al. (2008). Measurement and analysis of interconnect crosstalk due to single events in a 90 nm CMOS technology. IEEE Transactions on Nuclear Science, 55(4), 2079–2084.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. An analytical model of crosstalk for nanometer CMOS circuits with single event transient;2022 IEEE 6th Advanced Information Technology, Electronic and Automation Control Conference (IAEAC );2022-10-03