Design of a tunable delay line with on-chip calibration to generate process-invariant PWM signal for in-memory computing-Reference-Cited by-同舟云学术

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Design of a tunable delay line with on-chip calibration to generate process-invariant PWM signal for in-memory computing

Published:2023-06-28 Issue:1-2 Volume:116 Page:5-13
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Monga Kanika,Shenoy Meetha V.,Chaturvedi Nitin,Gurunarayanan S.

Funder

DST & MeitY

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

https://link.springer.com/content/pdf/10.1007/s10470-023-02169-5.pdf

Reference17 articles.

1. Martino, D., Abu, S., Luca, B., & Evangelos, E. (2021). Accelerating inference of convolutional neural networks using in-memory computing. Frontiers in Computational Neuroscience. https://doi.org/10.3389/fncom.2021.674154

2. Gonugondla, S. K., Kang, M. G., & Shanbhag N. (2018). A 42pJ/decision 3.12TOPS/W robust in-memory machine learning classifier with on-chip training. In 2018 IEEE international solid-state circuits conference (pp. 490–492). https://doi.org/10.1109/ISSCC.2018.8310398.

3. Ali, M., Jaiswal, A., Kodge, S., et al. (2020). IMAC: In-memory multi-bit multiplication and Accumulation in 6T SRAM array. IEEE Trans Circuits Syst I, 67(8), 2521–2531. https://doi.org/10.1109/TCSI.2020.2981901

4. Biswas, A., & Chandrakasan, A. P. (2019). CONV-SRAM: An energy-efficient SRAM with in-memory dot-product computation for low-power convolutional neural networks. IEEE Journal of Solid-State Circuits, 54(1), 217–230. https://doi.org/10.1109/JSSC.2018.2880918

5. Rehman, S., Khafaji, M., Carta, C., Ellinger, F., (2018). A Comparison of Broadband and Tunable Delay-Line Structures in 45-nm CMOS. In2018 international workshop on integrated nonlinear microwave and millimetre-wave circuits (INMMIC) (pp. 1–3).

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Memory-Based Computing for Energy-Efficient AI: Grand Challenges;2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC);2023-10-16

2. Special issue: 26th international symposium on VLSI design and test 2022;Analog Integrated Circuits and Signal Processing;2023-08

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