Ultra low-voltage CMOS transconductance amplifiers

Author:

Berg Yngvar

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference21 articles.

1. Galton, I. (2009). Low-voltage analog and mixed-signal CMOS circuit design. In IEEE International solid-state conference (ISSCC), p. 502.

2. Ramirez-Amgulo, J., Gonzalez-Carvajal, R., Lopez-Martin, A., & Torralba, A. (2004). Some techniques for low-voltage continuous-time analog circuit operation. In Proceedings of the 2004 IEEE Dallas/CAS Workshop (DCAS-04), pp. 87–112.

3. Binkley, D.M. (2008). Tradeoffs and optimization in analog CMOS design, 1st ed. New York: Wiley-Interscience.

4. Michel, F., & Steyaert, M. S. J. (2012). 250 mV 7.5 W 61 dB SNDR SC modulator using near-threshold-voltage-biased inverter amplifiers in 130 nm CMOS. IEEE Journal of solid-state circuits, 47(3), 709–721.

5. Fayomi, C. J. B., Roberts, G. W., & Sawan, M. (2005). Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: Design and chip characterization. In IEEE International symposium on circuits and systems (ISCAS), Vol. 3, pp. 2000–2003.

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