Low-energy real FFT architectures and their applications to seizure prediction from EEG

Author:

Sanjeet Sai,Sahoo Bibhu DattaORCID,Parhi Keshab K.

Funder

Apex Committee of SPARC, MHRD, New Delhi

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference32 articles.

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2. Ayinala, M., et al. (2013). An In-place FFT architecture for real-valued signals. IEEE Transactions on Circuits and Systems II: Express Briefs, 60(10), 652–656.

3. Yin, X., et al. (2016). Resource-efficient Pipelined architectures for radix-2 real-valued FFT with real datapaths. IEEE Transactions on Circuits and Systems II: Express Briefs, 63(8), 803–807.

4. Garrido, M., et al. (2009). A Pipelined FFT architecture for real-valued signals. IEEE Transactions on Circuits and Systems I: Regular Papers, 56(12), 2634–2643.

5. Meher, P. K., et al. (2015). Efficient VLSI architecture for decimation-in-time fast Fourier transform of real-valued data. IEEE Transactions on Circuits and Systems I: Regular Papers, 62(12), 2836–2845.

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