A new power-efficient CDMA-based transmitter for high-speed serial links

Author:

Al-Taee Alaa R.,Yuan Fei,Ye Andy

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference13 articles.

1. Yang, C., & Lee, Y. (2008). A PWM and PAM signaling hybrid technology for serial-link transceivers. IEEE Transactions on Instrumentation and Measurement, 57(5), 1058–1070.

2. Yuan, F. (2004). A fully differential 8-to-1 current-mode multiplexer for 10 Gbps serial links in 0.18-micron CMOS. IEE Electronics Letters, 40(13), 789–790.

3. Yoshimura, R., Keat, T., Ogawa, T., Hatanaka, S., Matsuoka, T., & Taniguchi, K. (2000). DS-CDMA wired bus with simple interconnection topology for parallel processing system LSIs. In: Proceedings of the IEEE International Solid-State Circuit Conference (pp. 370–371).

4. Chang, F., Poychowdhury, V., Zhang, L., Shin, H., & Qian, Y. (2001). RF/wireless interconnect for inter- and intra-chip communications. Proceedings of the IEEE, 89(4), 456–466.

5. Kim, J., Xu, Z., & Cheng, F. (2003). A 2 Gb/s source synchronous CDMA bus interface with simultaneous multi-chip access and reconfigurable I/O capability. In: Proceedings of the IEEE Custom Integrated Circuits Conference (pp. 317–320).

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