Mechanical stress estimation using PiezoFET octagonal current mirrors
Author:
Funder
CAPES
Instituto Eldorado
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
https://link.springer.com/content/pdf/10.1007/s10470-020-01647-4.pdf
Reference26 articles.
1. Suhling, J. C., & Jaeger, R. C. (2001). Silicon piezoresistive stress sensors and their application in electronic packaging. IEEE Sensors Journal, 1, 14–30.
2. Thompson, S. E., & Sun, G. (2006). Strained Si and the future direction of CMOS. In 2006 international symposium on VLSI technology, systems, and applications, 2006.
3. Popovic, R. S. (2010). Hall effect devices (2nd ed.). Abingdon: Taylor and Francis.
4. Jaeger, R. C., Ramani, R., Suhling, J. C., & Kang, Y. (1995). CMOS stress sensor circuits using piezoresistive field-effect transistors (PIFETs). In 1995 symposium on VLSI circuits, 1995. Digest of technical papers.
5. Hau, W. L. W., Yuen, M. M. F., Yan, G. Z., & Chan, P. C. H. (2000). A new stress chip design for electronic packaging applications. In International symposium on electronic materials and packaging, 2000. (EMAP 2000).
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