A 10-bit 300 MS/s pipeline ADC with time-domain MDAC
Author:
Funder
Ministry of Science and Technology, Taiwan
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
https://link.springer.com/content/pdf/10.1007/s10470-021-01858-3.pdf
Reference21 articles.
1. Hershberg, B., Weaver, S., & Moon, U. (2010). Design of a split-CLS pipelined ADC with full signal swing using an accurate but fractional signal swing opamp. IEEE Journal of Solid-State Circuits, 45(12), 2623–2633
2. Chai, Y., & Wu, J. T. (2012). A CMOS 5.37-mW 10-bit 200-MS/s dual-path pipelined ADC. IEEE Journal of Solid-State Circuits, 47(12), 2905–2915
3. Hershberg, B., Weaver, S., Sobue, K., Takeuchi, S., Hamashita, K., & Moon, U. (2012). Ring amplifiers for switched capacitor circuits. IEEE Journal of Solid-State Circuits, 47(12), 2928–2942
4. Chiang, S. W., Sun, H., & Razavi, B. (2014). A 10-bit 800-MS/s 19-mW CMOS ADC. IEEE Journal of Solid-State Circuits, 49(4), 935–949
5. Fiorenza, J. K., Sepke, T., Holloway, P., Sodini, C. G., & Lee, H. (2006). Comparator-based switched-capacitor circuits for scaled CMOS technologies. IEEE Journal of Solid-State Circuits, 41(12), 2658–2668
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