A 1.8 GHz temperature drift compensated LC-VCO for RFID transceiver
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
https://link.springer.com/content/pdf/10.1007/s10470-020-01694-x.pdf
Reference13 articles.
1. Manetakis, K.., Jessie, D., & Narathong, C. (2004). A CMOS VCO with 48% tuning range for modern broadband systems. In IEEE CICC symposium (pp. 265–268).
2. Okuno, K., Masaki, K., & Izumi, S., et al. (2015). A 2.23 ps RMS jitter 3 us fast settling ADPLL using temperature compensation PLL controller. In IEEE international conference on electronics (pp. 68–71).
3. Wu, G., & Sun, K., et al. (2014) A low-voltage and temperature compensated ring VCO design. In Circuits & systems conference (pp. 1–4).
4. Ravinuthula, V., & Finocchiaro, S. (2016). A low power high performance PLL with temperature compensated VCO in 65 nm CMOS. In Radio frequency integrated circuits symposium (pp. 31–34).
5. Tanzawa, T., Agawa, K., & Shibayama, H. (2005). A 2.4-GHz temperature-compensated CMOS LC-VCO for low frequency drift low-power direct-modulation GFSK transmitters. IEEE Transactions on Electronics, 88(4), 490–495.
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