A 10-bit 2.33 fJ/conv. SAR-ADC with high speed capacitive DAC switching using a novel effective asynchronous control circuitry
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s10470-019-01450-w.pdf
Reference26 articles.
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2. Razavi, B. (2013). Design considerations for interleaved ADCs. IEEE Journal of Solid-State Circuits, 48(8), 1806–1817. https://doi.org/10.1109/JSSC.2013.2258814 .
3. Hu, W., Liu, Y. T., Nguyen, T., Lie, D. C., & Ginsburg, B. P. (2013). An 8-bit single-ended ultra-low-power SAR ADC with a novel DAC switching method and a counter-based digital control circuitry. IEEE Transactions on Circuits and Systems I: Regular Papers, 60(7), 1726–1739. https://doi.org/10.1109/TCSI.2012.2230587 .
4. Guo, W., Kim, Y., Tewfik, A. H., & Sun, N. (2017). A fully passive compressive sensing SAR ADC for low-power wireless sensors. IEEE Journal of Solid-State Circuits, 52(8), 2154–2167. https://doi.org/10.1109/JSSC.2017.2695573 .
5. Weaver, S., Hershberg, B., & Moon, U.-K. (2014). Digitally synthesized stochastic flash ADC using only standard digital cells. IEEE Transactions On Circuits and Systems I: Regular Papers, 64(1), 84–91. https://doi.org/10.1109/TCSI.2013.2268571 .
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