A 1.41–1.72 GHz sigma-delta fractional-N frequency synthesizer with a PVT insensitive VCO and a new prescaler-Reference-Cited by-同舟云学术

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A 1.41–1.72 GHz sigma-delta fractional-N frequency synthesizer with a PVT insensitive VCO and a new prescaler

Published:2008-12-12 Issue:3 Volume:59 Page:265-273
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Zhao Bo,Mao Xiaojian,Yang Huazhong,Wang Hui

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

http://link.springer.com/content/pdf/10.1007/s10470-008-9264-8.pdf

Reference25 articles.

1. Miller, B., & Conley, R. J. (1991). A multiple modulator fractional divider. IEEE Transactions on Instrumentation and Measurement, 40(3), 578–583.

2. Riley, T. A., Copeland, M. A., & Kwasniewski, T. A. (1993). Delta-sigma modulation in fractional-N frequency synthesis. IEEE Journal of Solid-State Circuits, 28(5), 553–559.

3. Gupta, S. C. (1975). Phase-locked loops. Proceedings of the IEEE, 63(2), 291–306. doi: 10.1109/PROC.1975.9735 .

4. Lindsey, W. C., & Chak, M. C. (1981). A survey of digital phase-locked loops. Proceedings of the IEEE, 69(4), 410–431. doi: 10.1109/PROC.1981.11986 .

5. Guan-chyun, H., & Hung, J. C. (1996). Phase-locked loop techniques. A survey. IEEE Transactions on Industrial Electronics, 43(6), 609–615.

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1. Filter Design for A Fractional N-PLL Frequency Synthesizer At 2.4 GHz;IOP Conference Series: Materials Science and Engineering;2021-05-01

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