Integrated D-band transmitter and receiver for wireless data communication in 65 nm CMOS-Reference-Cited by-同舟云学术

Integrated D-band transmitter and receiver for wireless data communication in 65 nm CMOS

Published:2014-11-08 Issue:1 Volume:82 Page:171-179
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Xu Zhiwei,Gu Qun Jane,Wu Yi-Cheng,Chang Mau-Chung Frank

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

http://link.springer.com/content/pdf/10.1007/s10470-014-0379-9.pdf

Reference10 articles.

1. Afshar, B. et al. (2008). A robust 24 mW 60 GHz receiver in 90 nm standard CMOS. In: ISSCC.

2. Radisic, V., et al. (2008). Demonstration of 184 and 255-GHz amplifiers using InP HBT Technology. IEEE Microwave and Wireless Components Letters, 18(4), 281–283.

3. Gianesello, F., & Gloria, D. et al. (2006). 65 nm RFCMOS technologies with bulk and HR SOI substrate for millimeter wave passives and circuits characterized up to 220 GHz, International Microwave Symposium. pp. 1927–1930.

4. Seo, M., Jagannathan, B., Carta, C., Pekarik, J., Chen, L., Yue, C. P., & Rodwell, M. (2009). A 1.1 V 150 GHz amplifier with 8 dB gain and +6 dBm saturated output power in standard digital 65 nm CMOS using dummy-prefilled microstrip lines, ISSCC Digest of Technical Papers, pp. 484–485.

5. Nicolson, S. T et al. (2008) A 1.2 V, 140 GHz receiver with on-die antenna in 65 nm CMOS, IEEE RFIC Symposium, pp. 229–232.

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