1. Chaves, R., & Sousa, L. (2003). RDSP: A RISC DSP based on residue number system. In Proceedings of the Euromicro symposium on digital system design, 2003 (pp. 128–135).
2. Jeong, W., An, S., Kim, M., Heo, S., Kim, Y., Moon, S., & Lee, Y. (1999). Design of a combined processor containing a 32-bit RISC microprocessor and a 16-bit fixed-point DSP on a chip. In 6th international conference on VLSI and CAD, 1999. ICVC ’99 (pp. 305–308).
3. Bernocchi, G.L., Cardarilli, G.C., Del Re, A., Nannarelli, A., & Re, M. (2007). Low-power adaptive filter based on RNS components. In IEEE international symposium on circuits and systems, 2007. ISCAS 2007 (pp. 3211–3214).
4. Efstathiou, C., & Vergos, H.T. (2000). Modified Booth 1’s complement and modulo 2n–1 multipliers. In The 7th IEEE international conference on electronics, circuits and systems, 2000. ICECS 2000 (Vol. 2, pp. 637–640).
5. Zimmermann, R. (1999). Efficient VLSI implementation of modulo (2n plusmn;1) addition and multiplication. In Proceedings of the 14th IEEE symposium on computer arithmetic, 1999 (pp. 158–167).