An open loop compensation technique for reducing supply sensitivity of CML ring oscillator
Author:
Funder
Chinese National R&D Project
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/article/10.1007/s10470-017-1039-7/fulltext.html
Reference22 articles.
1. Abidi, A. A. (2006). Phase noise and jitter in CMOS ring oscillators. IEEE Journal of Solid-State Circuits, 41(8), 1803–1816.
2. Lee, T. H., & Hajimiri, A. (2000). Oscillator phase noise: A tutorial. IEEE Journal of Solid-State Circuits, 35(3), 326–336.
3. Heydari, P. (2004). Analysis of the PLL jitter due to power/ground and substrate noise. IEEE Transactions on Circuits and Systems I: Regular Papers, 51(12), 2404–2416.
4. Herzel, F., & Razavi, B. (1999). A study of oscillator jitter due to supply and substrate noise. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 46(1), 56–62.
5. Arakali, A., Gondi, S., & Hanumolu, P. K. (2009). Low-power supply-regulation techniques for ring oscillators in phase-locked loops using a split-tuned architecture. IEEE Journal of Solid-State Circuits, 44(8), 2169–2181.
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