Author:
Huang Chen-Wei,Gui Ping,Fan Yanli,Morgan Mark
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Reference19 articles.
1. Ting, W., Pavan, H. K., Kartikeya, M., & Un-Ku, M. (2009). Method for a constant loop bandwidth in LC-VCO PLL frequency synthesizers. IEEE Journal of Solid-State Circuits, 44(2), 427–435.
2. Abhijith, A., Srikanth, G., & Pavan, H. K. (2009). Low-power supply-regulation techniques for ring oscillators in phase-locked loops using a split-tuned architecture. IEEE Journal of Solid-State Circuits, 44(8), 2169–2181.
3. Dongmin, P., & SeongHwan, C. (2009). Design techniques for a low-voltage VCO with wide tuning range and low sensitivity to environmental variations. IEEE Transactions on Microwave Theory and Techniques, 57(4), 767–774.
4. Rylyakov, A., Tierno, J., English, G., Sperling, M., & Friedman, D. (2008). A wide tuning range (1 GHz-to-15 GHz) fractional-N all-digital PLL in 45 nm SOI. In IEEE custom integrated circuits conference.
5. Mair, H., & Xiu, L. (2000). An architecture of high performance frequency and phase synthesis. IEEE Journal of Solid-State Circuits, 35(6), 835–846.
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