An efficient method of Pareto-optimal front generation for analog circuits
Author:
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Link
http://link.springer.com/article/10.1007/s10470-017-1073-5/fulltext.html
Reference41 articles.
1. Ali, S., Ke, L., Wilcock, R., & Wilson, P. (2009). Improved performance and variation modelling for hierarchical-based optimisation of analogue integrated circuits. In Proceedings of the conference on design, automation and test in Europe, DATE ’09 (pp. 712–717). 3001 Leuven, Belgium, Belgium.
2. Barros, M., Guilherme, J., & Horta, N. (2010). Analog circuits optimization based on evolutionary computation techniques. Integration, the VLSI Journal, 43(1), 136–155.
3. Bernarclinis, F. D., Gambini, S., Vincis, R., & Svelto, F. (2004). Design space exploration for a UMTS front-end exploiting analog platforms. In ICCAD (pp. 923–930). IEEE Computer Society/ACM.
4. Bernardinis, F. D., Jordan, M. I., & Sangiovanni-Vincentelli, A. (2003). Support vector machines for analog circuit performance representation. In Proceedings of DAC (pp. 964–969).
5. Boolchandani, D., Ahmed, A., & Sahula, V. (2011). Efficient kernel functions for support vector machine regression model for analog circuits’ performance evaluation. Analog Integrated Circuits and Signal Processing, 66(1), 117–128.
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