A low voltage current mode CMOS integrated receiver front-end for GPS system

Author:

Cheng Wang-Chi,Chan Cheong-Fat,Pun Kong-Pang,Choy Chiu-Sing

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference20 articles.

1. Lee, K. H., & El-Gamal, M. N. (2002). A very low-voltage (0.8 V) CMOS receiver frontend for 5 GHz RF applications. In IEEE international symposium on circuits and systems, 2002 (ISCAS 2002) (Vol. 1, pp. I-125–I-128), 26–29 May 2002.

2. Liu, Z., & Parke, S. (2003). A low-voltage low-power 1.5 GHz CMOS LNA design. In Proceedings of the 15th biennial university/government/industry microelectronics symposium, 2003 (pp. 340–341), 30 June–2 July 2003.

3. Long, J., & Weber, R. J. (2004). A low voltage, low noise CMOS RF receiver front-end. In Proceedings of the 17th International Conference on VLSI Design, 2004 (pp. 393–397).

4. Long, J. R., & Maliepaard, M. C. (1999). A 1 V 900 MHz image-reject downconverter in 0.6 μm CMOS. In Procceedings of the IEEE custom integrated circuits 1999 (pp. 665–668), 16–19 May 1999.

5. Fong, N. H. W., Plouchart, J.-O., Zamdmer, N., Liu, D., Wagner, L. F., Plett, C., et al. (2003). A 1-V 3.8–5.7-GHz wide-band VCO with differential tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology. IEEE Transactions on Microwave Theory and Techniques, 51(8), 1952–1959.

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