R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devices-Reference-Cited by-同舟云学术

R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devices

Published:2023-09 Issue:3 Volume:116 Page:161-184
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Dhakad Narendra Singh,Chittora Eshika,Sharma Vishal,Vishvakarma Santosh Kumar

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

https://link.springer.com/content/pdf/10.1007/s10470-023-02181-9.pdf

Reference29 articles.

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3. Si, X., Khwa, W., Chen, J., Li, J., Sun, X., Liu, R., Yu, S., Yamauchi, H., Li, Q., & Chang, M. (2019). A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors. IEEE Transactions On Circuits And Systems I: Regular Papers, 66, 4172–4185.

4. Gonugondla, S., Kang, M., & Shanbhag, N. (2018). A variation-tolerant in-memory machine learning classifier via on-chip training. IEEE Journal Of Solid-State Circuits, 53, 3163–3173.

5. Yin, S., Jiang, Z., Seo, J., & Seok, M. (2020). XNOR-SRAM: In-memory computing SRAM macro for binary/ternary deep neural networks. IEEE Journal Of Solid-State Circuits, 55, 1733–1743.