Funder
National Science Foundation of China
Shanghai Science and Technology Project
Open Project Program of Wuhan National Laboratory for Optoelectronics
Publisher
Springer Science and Business Media LLC
Reference37 articles.
1. Chang, D.-W., Lin, W.-C., Chen, H.-H.: Fastread: improving read performance for multilevel-cell flash memory. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. (TVLSI) 24(9), 2998–3002 (2016)
2. Choi, W., Jung, M., Kandemir, M.: Invalid data-aware coding to enhance the read performance of high-density flash memories. In: 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pp. 482–493 (2018)
3. Component-Level Characterization of 3D TLC, QLC, and Low-Latency NAND. https://www.flashmemorysummit.com/Proceedings2019/08-07-Wednesday/20190807_FTEC-202-1_Breen.pdf
4. Cui, J., Wu, W., Nie, S., et al.: VIOS: a variation-aware I/O scheduler for flash-based storage systems. In: IFIP International Conference on Network and Parallel Computing, pp. 3–16 (2016)
5. Cui, J., Wu, W., Zhang, X., et al.: Exploiting latency variation for access conflict reduction of NAND flash memory. In: Proceedings of the 32nd Symposium on Mass Storage Systems and Technologies (MSST), pp. 1–7 (2016)
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