Ground bounce noise reduction aware combinational multi threshold CMOS circuits for nanoscale CMOS multiplier
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://link.springer.com/content/pdf/10.1007/s12200-013-0328-8.pdf
Reference18 articles.
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3. Calimera A, Benini L, Macii A, Macii E, Poncino M. Design of a flexible reactivation cell for safe power-mode transition in powergated circuits. IEEE Transactions on Circuits and Systems I, Regular Papers, 2009, 56(9): 1979–1993
4. Mutoh S, Douseki T, Matsuya Y, Aoki T, Shigematsu S, Yamada J. 1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS. IEEE Journal of Solid-State Circuits, 1995, 30(8): 847–854
5. Pakbaznia E, Pedram M. Design of a tri-model multi-threshold CMOS switch with application to data retentive power gating. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2012, 20(2): 380–385
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