Author:
Wyrzykowski Roman,Szustak Lukasz,Rojek Krzysztof,Tomas Adam
Publisher
Springer Berlin Heidelberg
Reference12 articles.
1. AMD and GPGPU cluster,
https://hpc.man.poznan.pl/modules/resourcesection/item.php?itemid=61
2. Datta, K., Kamil, S., Williams, S., Oliker, L., Shalf, J., Yelick, K.: Optimization and performance modeling of stencil computations on modern microprocessors. SIAM Rev. 51(1), 129–159 (2009)
3. Kurzak, J., Bader, D., Dongarra, J.: Scientific Computing with Multicore and Accelerators. Chapman & Hall/CRC , Boca Raton (2010). (Chapman & Hall/CRC Computer and Information Science Series)
4. Nguyen, A., Satish, N., Chhugani, J., Changkyu, K., Dubey, P.: 3.5-D blocking optimization for stencil computations on modern CPUs and GPUs. In: Proceedings of the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, pp. 1–13 (2010)
5. NVIDIA Best Practices Guide,
http://developer.nvidia.com/nvidia-gpu-computing-documentation
Cited by
12 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献