Publisher
Springer Berlin Heidelberg
Reference26 articles.
1. Neil C. Wilhelm,“WhyWire DelaysWill No Longer Scaler for VLSI Chips,” SUN Microsystems Laboratories Technical Report TR-95-44, August 1995.
2. V. Agarwal, M. S. Hrishikesh, S.W. Keckler, D. Burger, “Clock Rate versus IPC: The End of the Road for Conventional Microarchitectures,” 27th Int. Symp. on Computer Architecture, pp. 248–259, June 2000.
3. S. Thompson, P. Packan, and M. Bohr, “MOS Scaling: Transistor Challenges for the 21st Century,” Intel Technology Journal, Q3, 1998.
4. M. S. Pittler, D. Powers, D. L. Schnabel,“System Development and Technology Aspects of the IBM 3081 Processor Complex,” IBM J ournal of Research and Development,, pp. 2–11, Jan. 1982.
5. M. August, G. Brost, C. Hsiung, A. Schiffler, “Cray X-MP: The Birth of a Supercomputer,” IEEE Computer, pp. 45–52, January 1989.