Speed Enhancement with Soft Computing Hardware

Author:

Daud Taher,Zebulum Ricardo,Duong Tuan,Ferguson Ian,Padgett Curtis,Stoica Adrian,Thakoor Anil

Publisher

Springer Berlin Heidelberg

Reference9 articles.

1. Duong, TA, Daud T, Thakoor AP (1995) United States Patent #5479579, Cascaded VLSI neural network architecture for on-line learning.

2. Stoica A, Keymeulen D, Tawel R, Lazaro C, Li W-T (1999) Evolutionary experiments with a fine-grained reconfigurable architecture for analog and digital CMOS circuits. In Stoica A, Keymeulen D, Lohn J (eds) Proc. First NASA/DOD Workshop on Evolvable Hardware, IEEE Computer Society Press, pp. 77–84.

3. Udomkesmalee S, Thakoor A, Padgett C, Daud T, Fang W-C, Suddarth SC (1997) VIGILANTE: An advanced sensing/processing testbed for ATR applications. In Sadjadi FA (ed) Proc. SPIE Conf. Automatic Target Recognition VII vol. 3069, pp. 82–93.

4. Howard A, Padgett C (1999) Real time intelligent target detection and analysis with machine vision In Computational Intelligence: Methods and Applications (CIMA).

5. Howard A, Padgett C, Brown K (1999) Intelligent target detection in hyperspectral imagery In Proceedings of the Thirteenth International Conference on Applied Geologic Remote Sensing.

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