Design of a Fault Tolerant FPGA

Author:

Bartzick T.,Henze M.,Kickler J.,Woska K.

Publisher

Springer Berlin Heidelberg

Reference4 articles.

1. Abramovici, Stroud, Hamilton, Wijesuriya, and Verma. Using Roving STARs for On-Line testing and Diagnosis of FPGAs in Fault-Tolerant Applications. Intl. Test Conference, Atlantic City, NJ, 1999.

2. Christine Bauer, Peter Zipf, and H. Wojtkowiak. Integration von Fehlertoleranz im Codesign. In Proc. ThirdITG/GI/GMM-W orkshop, 2000.

3. André DeHon. Dynamically Programmable Gate Arrays: A Step Toward Increased Computational Density. Proceedings of the 1996 Canadian Workshop of Field Programmable Devices, 1996.

4. Peter Zipf, Christine Bauer, and H. Wojtkowiak. A Hardware Extension to Improve Fault Handling in FPGA-Based Systems. Design and Diagnostic of Electronic Circuits and Systems Workshop (DDECS 2000), Smolenice Castle, Slovakia, April 5–7, 2000.

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