Partial Run-Time Reconfiguration Using JRTR

Author:

McMillan Scott,Guccione Steven A.

Publisher

Springer Berlin Heidelberg

Reference9 articles.

1. Patrick Lysaght and John Dunlop. Dynamic reconfiguration of FPGAs. In Will Moore and Wayne Luk, editors, More FPGAs, pages 82–94. Abingdon EE&CS Books, Abingdon, England, 1993.

2. Herman Schmit. Incremental reconfiguration for pipelined applications. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 47–55, Los Alamitos, CA, April 1997. IEEE Computer Society Press.

3. Jim Burns, Adam Donlin, Jonathan Hogg, Satnam Singh, and Mark de Wit. A dynamic reconfiguration run-time system. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 66–75, Los Alamitos, CA, April 1997. IEEE Computer Society Press.

4. Steven A. Guccione and Delon Levi. Design advantages of run-time reconfiguration. In John Schewel, editor, Reconfigurable Technology: FPGAs for Computing and Applications, Proc. SPIE 3844, pages 87–92, Bellingham, WA, September 1999. SPIE — The International Society for Optical Engineering.

5. Steve Kelem. Virtex configuration architecture advanced users’ guide. Xilinx Application Note XAPP151, version 1.1, Xilinx, Inc., July 1999.

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