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2. A.J. Camilleri. “A role for Theorem Proving in Multi-processor Design”, Proceeding of the 10th International Conference on Computer Aided Verification (CAV’98),Vancouver, June/July 1998.
3. D.L.Dill, “What’s Between Simulation and Formal Verification”, Proceeding of the 35th Design Automation Conference (DAC’98), San Francisco, CA, USA, June 1998.
4. FormalCheck User’s Guide. Bell labs Design Automation, Lucent Technologies, V1. 1, 1997
5. K. L. McMillan, “Symbolic model checking - an approach to the state explosion problem”, Ph.D. thesis, SCS, Carnegie Mellon University, 1992. ( Also Cadence Design Systems, www pages. )