1. D. Hisamoto, S. Kimura, T. Kaga, Y. Nakagome, M. Isoda, T. Nishida, and E. Takeda, “A New Stacked Cell Structure for Giga-Bit DRAMs using Vertical Ultra-Thin SOI (DELTA) MOSFETs,” IEDM Dig., pp. 959–961, 1991.
2. D. Hisamoto, T. Kaga, Y. Kawamoto and E. Takeda, “A Fully Depleted Lean-Channel Transistor(DELTA)—A Novel Vertical Ultra Thin SOI MOSFET,” IEDM Dig., pp.833–836, 1989.
3. K. W. Su and J. B. Kuo, “Analytical Threshold Voltage Formula Including Narrow-Channel Effects for VLSI Mesa-Isolated Fully Depleted Ultrathin Silicon-on-Insulator N-Channel Metal-Oxide-Silicon Devices,” Jpn. J. Appl. Phys., Vol. 34, No. 84, pp. 4010–4019, Aug. 1995.
4. D. K. Nayak, J. C. S. Woo, G. K. Yabiku, K. P. MacWilliams, J. S. Park, and K. L. Wang, “High-Mobility GeSi PMOS on SIMOX,” IEEE Elec. Dev. Let, Vol. 14, No. 11, pp. 520–522, Nov. 1993.
5. D. K. Nayak, J. C. S. Woo, J. S. Park, K. L. Wang, and K. P. MacWilliams, “Channel Mobility of GeSi Quantum-Well P-MOSFET’s,” Symp. VLSI Tech. Dig., pp.107–108, 1991.