1. Allan, V., Jones, R., Lee, R., and Allan, S. (1993). Software pipelining. ACM Computing Surveys, 27 (3): 367–432.
2. Callahan, D., Carr, S., and Kennedy, K. (1990). Improving register allocation for subscripted variables. In Proceedings of ACM SIGPLAN 1990 Conference on Programming Language Design and Implementation, pages 53–65, White Plains, New York.
3. Chame, J. and Moon, S. (1999). A tile selection algorithm for data locality and cache interference. In Proceedings of the Thirteenth ACM International Conference on Supercomputing, pages 492–499, Rhodes, Greece.
4. Coleman, S. and McKinley, K. S. (1995). Tile size selection using cache organization and data layout. In Proceedings of ACM SIGPLANConference on Programming Language Design and Implementation, pages 279–290, La Jolla, CA.
5. Ferrante, J., Sarkar, V., and Thrash, W.(1991). On estimating and enhancing cache effectiveness. In Proceedings of the Fourth International Workshop on Languages and Compilers for Parallel Computing. Also in Lecture Notes in Computer Science pp. 328–341Springer-Verlag, August 1991.