Author:
Gerez Sabih H.,de Groot Sonia M. Heemstra,Bonsma Erwin R.,Heijligers Marc J. M.
Reference72 articles.
1. Bonsma, E.R. and S.H. Gerez, “A Genetic Approach to the Overlapped Scheduling of Iterative Data-Flow Graphs for Target Architectures with Communication Delays”, ProRISC Workshop on Circuits, Systems and Signal Processing, Mierlo, The Netherlands, (November 1997).
2. Chao, D.Y. and D.T. Wang, Iteration Bounds of Single-Rate Data Flow Graphs for Concurrent Processing, IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 40 (9), pp. 629–634, (September 1993).
3. Chen, D.C. and J.M. Rabaey, A Reconfigurable Multiprocessor IC for Rapid Prototyping of Algorithmic-Specific High-Speed DSP Data Paths, IEEE Journal of Solid-State Circuits, Vol. 27 (12), pp. 1895–1904, (December 1992).
4. Cormen, T.H., C.E. Leiserson and R.L. Rivest, Introduction to Algorithms, MIT Press, Cambridge, Massachusetts, (1990).
5. Davis, A.L. and R.M. Keller, Data Flow Program Graphs, IEEE Computer, pp. 2641, (February 1982).