Hardware implementation of digital pseudo-random number generators for real-time applications
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Publisher
Springer Science and Business Media LLC
Link
https://link.springer.com/content/pdf/10.1007/s11760-024-03082-8.pdf
Reference22 articles.
1. Gafsi, M., et al.: FPGA hardware acceleration of an improved chaos-based cryptosystem for real-time image encryption and decryption. J. Amb. Intell. Human Comput. 14, 7001–7022 (2023). https://doi.org/10.1007/s12652-021-03555-5
2. Martínez-Fuentes, O., et al.: Family of controllers for predefined-time synchronization of Lorenz-type systems and the Raspberry Pi-based implementation. Chaos, Solitons Fractals 179, 114462 (2024). https://doi.org/10.1016/j.chaos.2024.114462
3. Hafsa, A., Gafsi, M., Machhout, M.: ‘A lightweight and robust block cipher algorithm for real-time applications. Signal, Image Video Process. (2023). https://doi.org/10.1007/s11760-023-02831-5
4. Gafsi, M., et al.: Hardware implementation of a strong pseudorandom number generator based block-cipher system for color image encryption and decryption. Int. J. Circ. Theor. Appl. 51(1), 410–436 (2023). https://doi.org/10.1002/cta.3415,10.1002/cta.3415
5. Hafsa, A., Fradi, M., Sghaier, A., et al.: Real-time video security system using chaos- improved advanced encryption standard (IAES). Multimed. Tools Appl. 81, 2275–2298 (2022). https://doi.org/10.1007/s11042-021-11668-4
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