Using Formal Verification Techniques to Reduce Simulation and Test Effort-Reference-Cited by-同舟云学术

Using Formal Verification Techniques to Reduce Simulation and Test Effort

Published:2001 Issue: Volume: Page:465-477
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
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Author:

Laurent O.,Michel P.,Wiels V.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-45251-6_27

Reference9 articles.

1. P. Caspi, N. Halbwachs, P. Pilaud, and P. Raymond. The synchronous dataflow programming language Lustre. Proceedings of IEEE, Another Look at Real-time programming, 79(9): 1305–1319, September 1991.

2. N. Halbwachs, Lagnier F., and Raymond P. Synchronous observer and the verification of reactive systems. In Third International Conference on Algebraic Methodology and Software Technology, AMAST’93, Twente, June 93.

3. N. Halbwachs, F. Lagnier, and C. Ratel. Programming and verifying real time systems by means of the synchronous data-flow language Lustre. IEEE Transactions on Software Engineering, special issue on the specification and analysis of real time systems, september 1992.

4. Magnus Ljung. Formal modelling and automatic verification of Lustre programs using np-tools. Master’s thesis, Royal Institute of Technology, Department of Tele-informatics, 1999.

5. Prover Technology AB. NP-Tools 2.4 Reference manual, 1999.

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