A Heuristic for Symmetry Reductions with Scalarsets-Reference-Cited by-同舟云学术

A Heuristic for Symmetry Reductions with Scalarsets

Published:2001 Issue: Volume: Page:518-533
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
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Author:

Bošnački Dragan,Holenderski Leszek,Dams Dennis

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-45251-6_30

Reference22 articles.

1. D. Bošsnački, Enhancing State Space Reduction Techniques for Model Checking, Ph.D. Thesis, Department of Computer Science, Eindhoven University of Technology, expected in 2001.

2. D. Bošnački, D. Dams, Integrating real time into Spin: a prototype implementation, in S. Budkowski, A. Cavalli, E. Najm (eds), Proc. of FORTE/PSTV’98 (Formal Description Techniques and Protocol Specification, Testing and Verification), pp. 423–438, Paris, France, 1998.

3. Lect Notes Comput Sci;D. Bošnački,2000

4. E.M. Clarke, R. Enders, T. Filkorn, S. Jha, Exploiting symmetry in temporal logic model checking, Formal Methods in System Design, Vol. 19, pp. 77–104, 1996.

5. E.M. Clarke, O. Grumberg, D.A. Peled, Model Checking, The MIT Press, 2000.

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