An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits

Author:

Jiménez Raúl,Acosta Antonio J.,Peralías Eduardo J.,Rueda Adoración

Publisher

Springer Berlin Heidelberg

Reference11 articles.

1. Allstot, D. J., Chee, S-H. and Shrivastawa, M.: Folded source-coupled logic vs. CMOS static logic for low-noise mixed-signal ICs. IEEE Transactions on Circuits and Systems I, vol 40, pp 553–563, Sept. 1993.

2. Ng, H-T. and Allstot, D. J.: CMOS Current Steering Logic for Low-Voltage Mixed-Signal Integrated Circuit. IEEE Trans. on VLSI Systems, Vol. 5, pp 301–308, Sept. 1997.

3. Tsividis, Y.: Mixed Analog-Digital VLSI Design and Technology. McGraw-Hill, 1995.

4. Albuquerque, E., Fernandes, J. and Silva, M.: NMOS current-balanced logic. Electronics Letters, vol 32, pp 997–998, May 1996.

5. Jiménez, R., Acosta, A.J., Juan, J., Bellido, M.J. and Valencia, M.: Study and Analysis of Low-Voltage/Low-Power CMOS Logic Families for Low Switching Noise. Proc. of 9th Int. Workshop Power and Timing Modeling, Optimization and Simulation (PATMOS’99), pp. 377–386, Kos Island, October 1999.

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