Formal verification and quantitative metrics of MPSoC data dynamics

Author:

Zhang Hui123,Wu Jinzhao4

Affiliation:

1. Chengdu Institute of Computer Application, Chinese Academy of Sciences, 610041, Chengdu, China

2. University of Chinese Academy of Sciences, 100049, Beijing, China

3. Guizhou Bank Postdoctoral Station, 550001, Guiyang, China

4. Guangxi Key Laboratory of Hybrid Computational and IC Design Analysis, Guangxi University for Nationalities, 53006, Guangxi, China

Abstract

Abstract Multiprocessor system on chip (MPSoC) implements system functions through tasks. It is necessary to estimate system behaviors early in the design process without actual hardware implementation. As there are a huge variety in freedom of choices in the mapping of tasks, existing researches mainly focus on the schedulability analysis and resource constraints, with a lack of concerning on how data in tasks “behaves” in different schedulings. In practical applications, tasks are achieved by sequential executions of code blocks, which change the variables accordingly. Some variables are shared by all the tasks through global memory, such as public data, critical signals and so on. Changes of these data reflect functions of the system which also deserves attention. Data dynamics can illustrate data changes within a task as well as data exchanges between tasks, and thus can depict scheduling with more detail than just telling whether they can be scheduled. This paper proposes a new formal approach by combing hybrid automata and probabilistic timed automata to model MPSoC data dynamics, describing its real-time scheduling characteristics, concurrency, and probability. Furthermore, we also propose a new quantitative metric for measuring data dynamics named “reach-ratio” to compute the probability, weighted over tasks, of starting a task from which a certain area of the state space can be reached, where the tasks must be started within a time-bound that varies from task to task. The reach-ratio metric, as a supplement of traditional properties such as safety, liveness and fairness, reflects the extent of which the system achieves the intended function at a given scheduling strategy. Case study investigations of our new formal approach provide empirical evidence for MPSoC designers to balance controller policy without hardware implementation.

Funder

National Natural Science Foundation of China (CN)

Natural Science Foundation of Guangxi Province (CN)

Scientific Research Project

Publisher

Association for Computing Machinery (ACM)

Subject

Theoretical Computer Science,Software

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