Affiliation:
1. Department of Computer Science, University of Sheffield, Sheffield, UK
2. School of Information Technology and Electrical Engineering, The University of Queensland, 4072, Brisbane, Australia
Abstract
Abstract
Formal specification languages such as Z, B and VDM are used in the incremental development of abstract specifications (suitable for establishing required properties) to more concrete specifications (resembling the final implementation). This incremental development process, known as
refinement
, preserves all observable properties of the original abstract specification. Recent research has looked at applying temporal-logic model checking to such specification languages. While this assists in the establishment of properties of the abstract specification, temporal-logic properties typically refer to state variables which are regarded as non-observable. Hence, such properties are not guaranteed to be preserved by refinement. This paper investigates the classes of temporal-logic properties which are preserved by refinement, and for some of those properties that are not preserved in general, the restrictions on the refinement process under which they are preserved. Results are presented for the temporal logics LTL, CTL and the
μ
-calculus and the formal specification language Z. They apply equally, however, to related formal specification languages such as B and VDM.
Publisher
Association for Computing Machinery (ACM)
Subject
Theoretical Computer Science,Software
Cited by
5 articles.
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1. On the Preservation of Properties When Changing Communication Models;Lecture Notes in Computer Science;2023
2. State-Based Languages: Z and B;Refinement;2018
3. A refinement-based compiler development for synchronous languages;Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design;2017-09-29
4. Foundations for using linear temporal logic in Event-B refinement;Formal Aspects of Computing;2016-11
5. Bibliography;From Action Systems to Distributed Systems;2016-04-20