Discovering and correcting a deadlock in a channel implementation-Reference-Cited by-同舟云学术

Discovering and correcting a deadlock in a channel implementation

Published:2019-08 Issue:4 Volume:31 Page:411-419
ISSN:0934-5043
Container-title:Formal Aspects of Computing
language:en
Short-container-title:Form. Asp. Comput.

Author:

Lowe Gavin¹

Affiliation:

1. Department of Computer Science, University of Oxford, Oxford, UK

Abstract

Abstract We investigate the cause of a deadlock in the implementation of a channel in a message-passing concurrency API. We model the channel implementation using the process algebra CSP, and then use the model checker FDR to find the cause of the deadlock. The bug is rather subtle, and arguably infeasible to spot by hand. We then propose a straightforward fix to the bug, and use CSP and FDR to verify this fix.

Publisher

Association for Computing Machinery (ACM)

Subject

Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/s00165-019-00487-y.pdf

Reference20 articles.

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4. Deadlock analysis in networks of communicating processes

5. Gibson-Robinson T Armstrong P Boulgakov A Roscoe AW (2014) FDR3—a modern refinement checker for CSP. In: Proceedings of Tools and algorithms for the construction and analysis of systems (TACAS) vol 8413. LNCS

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